The purpose of this site is to enable designers and project managers to benefit from today’s best practices in Mixed-Signal Functional Verification for chip project success.

The Problem:

Today’s chips are complicated interconnected systems of digital-logic, CPU, with software, and analog. Fabricating the first chip is an expensive proposition, and errors in the design database can cause expensive delays in getting to volume production with production software in time to hit the best market window.

Transistor level simultion cannot start until the design is essentially finished, and it’s time consuming nature means that results are too late to be meaningful feedback to the design functionality team.

Solutions:

Faster and Earlier simulation can be provided by abstracted models of the design behavior. While the details of modeling in the current languages can be difficult to master, tooling is now available to assist designers with the tasks of creating the models, checking their behavior, and cross checking with detailed block level transistor design.

We can help your team succeed with these methods.